Logical Gate Set Tomography Explained: Sandia and Quantinuum's First Full Map of Logical Qubit Noise

Illustrative image: a trapped-ion chip (NIST, 2011) — the same hardware family as Quantinuum's H1-1, not the H1-1 system itself. Image: Wikimedia Commons / Y. Colombe / NIST, public domain (US federal government work).

TL;DR: Logical gate set tomography explained in one line: Sandia National Laboratories and Quantinuum have produced the first full, self-consistent map of the noise on a complete set of error-corrected quantum gates — run as the final experiment on Quantinuum's 20-qubit H1-1 trapped-ion system — showing that logical errors mostly behave the way fault-tolerance theory assumes, with small coherent drifts hiding underneath.

📌 KEY HIGHLIGHTS

• First full logical gate-set map: the first self-consistent, tomographic reconstruction of a universal single-qubit logical gate set, encoded in the seven-qubit Steane code on Quantinuum's H1-1.
• Real error correction, not bookkeeping: corrections were applied as physical pulses to the ions in real time, instead of the software Pauli-frame tracking that can hide coherent errors.
• The headline result is reassuring: in the experimental data, logical noise looked predominantly Pauli-stochastic, with no statistically significant memory effects — the assumption fault-tolerance theory relies on.
• The fine print matters: high-shot emulator runs found small but real coherent over-rotations (about 0.0015π) and weak non-Markovian behaviour, traced to dephasing during ion transport and cooling.
• Preprint, not peer-reviewed yet: the paper (arXiv:2610.19034) was posted 13 October 2026 and reported 30 October; its claims await independent peer review.

Logical gate set tomography explained: what happened?

Quantum error correction can suppress noise, but predicting whether a computation will succeed needs more than an error rate — it needs to know what kind of noise survives correction. That is the gap Sandia National Laboratories and Quantinuum set out to close with "logical gate set tomography" (logical GST), described in their paper Logical gate set tomography, posted to arXiv on 13 October 2026 and reported on 30 October 2026.

Gate set tomography itself is not new: Sandia has developed it since 2012 as a calibration-free way to characterise physical qubits, reconstructing a whole gate set — preparation, gates and measurement — self-consistently, without trusting any pre-calibrated component. What is new is lifting it to the logical level: applying it to a qubit protected by error correction.

The experiment ran on a single logical qubit encoded in the [[7, 1, 3]] Steane code — seven data qubits plus six syndrome degrees of freedom — on Quantinuum's System Model H1-1, a 20-qubit trapped-ion processor. It was the final experimental campaign on H1-1. The characterised gate set covered everything a universal single-qubit computation needs: logical state initialisation (|0⟩_L), terminating measurement (M_Z,L), transversal Clifford gates (H_L, S_L, I_L), and the non-transversal T_L gate, implemented by magic-state injection and teleportation with a 95.9% acceptance rate per attempt.

The crucial design choice was active error correction. Standard logical benchmarking often tracks errors in software using Pauli-frame tracking, which can artificially "twirl" away coherent phase errors. Here the team applied real-time classical feedforward, sending physical correction pulses directly to the ions inside the gate zones, so a coherent error would show rather than average out.

What the measurements found: the error table

Logical GST turns raw measurement data into gate fidelities and diamond distances — the worst-case error measures that fault-tolerance proofs actually use. The experimental results, from 50 shots across 158 compressed circuits, were:

Logical operation	Entanglement infidelity	Diamond distance error
Hadamard (HL)	0.7 ± 0.4%	1.3 ± 1.9%
Phase (SL)	0.2 ± 0.4%	1.3 ± 2.5%
Identity / QEC cycle (IL)	1.7 ± 9.2%	3.2 ± 16.8%
Non-Clifford (TL)	1.2 ± 1.5%	2.1 ± 3.9%
Initialisation (|0⟩L)	0.0 ± 2.3% (state infidelity)	—
Measurement (MZ,L)	0.1 ± 1.4%	0.7 ± 2.1%

Read the uncertainties honestly: several error bars rival the values themselves, because 50 shots per circuit is a small dataset. That is why the authors did not stop at the hardware data. The experimental data fit a Pauli-stochastic model (N_σS < 1) with no statistically significant non-Markovian memory effects (N_σCPTP < 2) — the behaviour threshold theorems assume — but the statistics were too coarse to rule out subtler effects.

Illustrative image: magnesium ions in NIST's planar ion trap — trapped-ion hardware of the kind logical GST characterises, not Quantinuum's H1-1. Image: Wikimedia Commons / Signe Seidelin and John Chiaverini / NIST, public domain (US federal government work).

What the high-shot emulator revealed underneath

To sharpen the picture, the team repeated the protocol in simulation at 14,100 shots using Quantinuum's high-fidelity H1-1E emulator. There, two subtle effects became statistically visible. First, small but significant logical non-Markovianity (N_σCPTP ≈ 4.9) — the logical noise carries a memory of earlier steps. Second, definitive evidence of coherent logical over-rotations of about 0.0015π on the S_L, I_L and T_L gates — systematic drifts, not random flips.

By toggling error channels in the emulator, the researchers traced the coherent drift to dephasing accumulated while ions are transported between zones and during sympathetic cooling. They also showed something conceptually important — non-Markovian behaviour at the logical level can emerge from the syndrome-extraction cycles themselves, even when the underlying physical noise is fully Markovian. Error correction can create memory effects in logical noise, a fact decoder designers need to know.

That is why the authors describe logical GST as platform-agnostic: any fault-tolerant machine, on any hardware, can be checked against the noise models its decoders assume, instead of hoping those assumptions hold.

Why it matters for India readers

No India-specific result comes with this paper, and this post claims none. The relevance is structural. India is building quantum capacity under its National Quantum Mission, and fault-tolerance characterisation is where that capacity will be judged: a machine that cannot prove its logical noise behaves as assumed cannot be trusted for long computations, whatever its qubit count. Tools like logical GST are how the field moves from announcing qubit numbers to certifying reliable computation — the same shift our recent coverage has tracked, from Quantinuum's Helios error-correction record to Alice & Bob's Shor algorithm compilation on cat qubits and IBM's quantum L-coupler advance toward fault-tolerant computing.

For students and researchers, there is a second lesson: the most useful result here is not a record but a diagnostic. The headline is reassuring, yet the most actionable finding — transport and cooling dephasing causing coherent drift — points engineers at a specific fix, which is precisely what a characterisation tool is for.

Should you care?

✅ Verdict: Yes, if you follow quantum computing's road to fault tolerance — this is the first time a complete logical gate set has been mapped this rigorously, and it mostly validates the theory while exposing exactly where it frays. ⏳ But treat it as a preprint diagnostic, not a product milestone: H1-1's campaign is over, the statistics are thin, and the real test is whether the method becomes standard practice on next-generation machines.

FAQs

What is logical gate set tomography? It is gate set tomography applied to an error-corrected (logical) qubit: a calibration-free protocol that reconstructs the full set of noisy logical operations — preparation, gates and measurement — self-consistently, so researchers can derive fidelities, diamond distances and tests for coherent and non-Markovian errors.

What is the difference between a physical qubit and a logical qubit? A physical qubit is a single quantum device, such as one trapped ion, which is noisy. A logical qubit encodes information across several physical qubits — here seven data qubits in the Steane code — so errors can be detected and corrected, at the cost of much more hardware per useful qubit.

Why does it matter whether logical noise is Pauli-stochastic? Fault-tolerance threshold theorems typically assume error correction turns messy physical noise into simple, uncorrelated Pauli errors (independent bit and phase flips). If logical noise instead has coherent drifts or memory, decoders built on that assumption can underperform, so verifying the assumption experimentally is essential.

Is this result peer-reviewed? Not yet. The work is a preprint (arXiv:2610.19034, posted 13 October 2026) by Sandia and Quantinuum researchers, reported on 30 October 2026. Its "first" claim and error figures should be read as the authors' results pending independent peer review.

Takeaway: Fault-tolerant quantum computing just got its first full noise map — and the map mostly confirms the theory, with small, fixable drifts marked on it.

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Sources

• Logical gate set tomography — arXiv:2610.19034 (Wysocki et al., Sandia National Laboratories and Quantinuum, submitted 13 October 2026)
• Sandia and Quantinuum Introduce Logical Gate Set Tomography to Map Fault-Tolerant Qubit Noise — Quantum Computing Report, 30 October 2026
• Gate Set Tomography — Nielsen et al., arXiv:2009.07301 (background on the physical-level protocol)