Image: IBM — ORNL's Umbra HPC system at the co-design platform (official image from IBM's announcement)
TL;DR: The IBM ORNL AMD quantum error correction platform explained: IBM's 120-qubit Nighthawk processor and ORNL's AMD-powered Umbra supercomputer now share one home. Announced on 5 November 2026, the platform lets researchers test the decoders that make fault-tolerant quantum computing possible — and IBM says the field is still about 230 times short of its 2028 goal.
📌 Key Highlights
- IBM, the US Department of Energy's Quantum Science Center at Oak Ridge National Laboratory (ORNL) and AMD launched a co-design platform for quantum error correction on 5 November 2026, based at IBM's site in Poughkeepsie, New York.
- It pairs IBM Quantum Nighthawk r2 processors (120 programmable qubits) with ORNL's Umbra HPC system — AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs — in one co-located, low-latency environment.
- Researchers can develop and test error-correction decoders, algorithms and hybrid quantum-classical workflows without building the infrastructure themselves.
- The platform supports the DOE's Genesis Mission goal of a scientifically relevant quantum computer by 2028: 100 logical qubits running 100,000 hard operations. Current progress — 70 logical qubits, 438 operations — is roughly 230 times short.
- The work feeds directly into IBM Quantum Starling, the fault-tolerant quantum computer IBM plans to deliver by 2029.
What happened?
Quantum computers are held back less by how many qubits they have than by how often those qubits go wrong. Qubits are fragile: heat, vibration and stray electromagnetic noise all corrupt calculations, so a long computation on bare physical qubits is almost guaranteed to fail. Quantum error correction is the fix — spread information across many physical qubits, run repeated checks, and use a classical computer to work out what went wrong and correct it. The problem is that the classical half of that job, called decoding, has to keep pace with the quantum chip, and until now researchers have usually had to stitch the two halves together themselves across separate systems and cloud connections.
On 5 November 2026, IBM, ORNL's Quantum Science Center and AMD removed that stitching job. Their new co-design platform puts the quantum and classical hardware in the same room at IBM's Poughkeepsie site: IBM Quantum Nighthawk processors on one side, ORNL's Umbra high-performance computing system on the other, linked to ORNL's broader supercomputing ecosystem. Researchers get a ready-made environment for quantum-centric supercomputing — quantum processors, CPUs and GPUs working as one system — and can concentrate on discovering better error-correction methods instead of building infrastructure. The platform will also connect to the Oak Ridge Leadership Computing Facility in Tennessee.
How the IBM ORNL AMD Quantum Error Correction Platform Works
The platform has two halves, each doing the job it is best at. The quantum side runs the error-correction experiments; the classical side does the heavy decoding and analysis, fast enough to keep up. Because the two sit next to each other, data moves between them with short delays — low latency that matters both for decoding and for conditional execution, where a quantum program picks its next operation based on a measurement taken mid-calculation.
| Half | Hardware | What it does |
|---|---|---|
| Quantum | IBM Quantum Nighthawk r2 processors — 120 programmable qubits, square-lattice connectivity | Runs error-correction circuits with mid-circuit measurement and real-time pulse control |
| Classical | ORNL Umbra HPC — AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs (16 GPUs, per IBM's Jerry Chow) | Trains and evaluates decoders at scale; provides the classical compute for decoding and orchestration |
Illustration: IBM — IBM Quantum System Two, which houses the Nighthawk processor
Nighthawk matters because of its layout, not just its qubit count. Its square-lattice connectivity — the highest of any IBM quantum processor architecture today — gives error-correction codes more room to lay out their checks, and its high circuit throughput and real-time pulse control let researchers measure qubits mid-calculation, act on the results immediately, and even work directly with raw measurement signals. That lets teams compare what each error-correction method demands in qubits, time and classical computing, and find where AMD GPUs help most. Nighthawk sits inside IBM Quantum System Two housing, an enclosure built for data-centre environments.
Why decoders are the bottleneck
Error correction works like this: an error-correcting code spreads one logical qubit across many physical qubits and runs repeated rounds of checks. A classical computer reads the data from each round and works out which errors occurred — the software doing that job is the decoder, and it has to keep up with the quantum processor. It is a fast, demanding, computationally intensive task, and as codes get bigger, decoding gets harder. That is why the platform puts GPUs next to the quantum chip: researchers can train and evaluate decoders at large scale and explore approaches that make future systems more efficient.
One approach the platform is built to test is hierarchical error correction, which layers two codes: an inner code protects qubits within a module, and an outer code wraps around the inner code's logical qubits and adds a second layer of protection. The inner code's own logical operations supply the long-range connections the outer code needs, so the code itself provides the added protection and the chip stays simpler. Recent IBM research found this approach could reach a trillion logical operations at a physical error rate of one in a thousand — but decoding happens at each layer, with results from one layer feeding into the next, so it relies on powerful classical computing in a low-latency environment. That is exactly what the co-design platform provides.
The platform also builds on IBM and AMD's existing collaboration, including using AMD GPUs to accelerate sample-based quantum diagonalization and demonstrating efficient quantum error decoding on AMD hardware. The two companies will also explore how future generations of AMD compute, networking and open software can be co-designed with quantum computers.
The 230x gap: the DOE Genesis Mission target
The platform aligns with the US Department of Energy's Genesis Mission, which aims to deploy a scientifically relevant quantum computer by 2028. Its Q Competition sets a concrete target: 100 logical qubits running 100,000 hard operations by late 2028. IBM says experiments have now run up to 70 logical qubits through 438 hard operations — a roughly 230-fold jump to reach the target. The table below shows the gap in IBM's own numbers.
| Measure | Today (IBM) | Genesis Mission target (late 2028) |
|---|---|---|
| Logical qubits | Up to 70 | 100 |
| Hard operations | 438 | 100,000 |
| Overall gap | — | Roughly 230 times |
IBM is blunt that this is a research platform, not a packaged product — IDC analyst Heather West told Network World it is "a research platform rather than a commercial product", and IBM's Jerry Chow confirmed the team is "not offering packaged solutions by any means yet". Its value is what it unlocks: larger, deeper, more capable quantum computations, tested on real hardware inside the workflows they will serve. The lessons will inform IBM Quantum Starling, the fault-tolerant quantum computer IBM plans to deliver by 2029. Reuters also notes that IBM said in May it plans to invest more than $10 billion in quantum computing as it aims to build the first large-scale quantum computer by 2029.
Not the October 2025 FPGA demo — what is different
Readers who follow IBM and AMD may remember a related announcement from October 2025: IBM showed a key quantum error-correction algorithm running in real time on standard AMD FPGA chips, with about 10 times the performance needed to keep up with the quantum computer. That was a single experiment proving a decoder could run fast enough on commodity hardware. The new platform is different in kind: it is permanent, shared infrastructure — a 120-qubit quantum processor and a GPU supercomputer co-located, open to researchers to develop and validate algorithms, workflows and applications over time. The FPGA demo proved decoding could be fast; the co-design platform is where the next generation of decoding gets built.
Why it matters for India readers
There is no India installation in this announcement, and no Indian availability to report — the platform sits in Poughkeepsie, New York, and serves researchers through IBM and ORNL. The relevance for Indian readers is the technology itself. Error correction is the shared bottleneck for every quantum programme in the world, including India's National Quantum Mission, and the methods tested on this platform — faster decoders, hierarchical codes, hybrid quantum-classical workflows — are the same methods every country's researchers will need. For Indian students and developers following quantum computing, the practical takeaway is where the field's centre of gravity now sits: not on adding qubits, but on the classical computing that keeps those qubits honest. IBM's own roadmap makes the timeline concrete — a scientifically useful machine by 2028, a fault-tolerant Starling by 2029 — and this platform is the testbed for both.
Should you care?
✅ Yes, if you follow quantum computing — this is the infrastructure the 2028 and 2029 milestones will be tested on, and the decoder research it enables decides how fast fault tolerance arrives. ⏳ Wait, if you want a usable quantum computer — nothing here is a product you can buy or use yet, and IBM's own numbers say the field is still about 230 times short of its 2028 target. The honest position is between the two: a serious, well-aimed step, with the hard work still ahead. If you want the closest parallel, read our explainer on IQM and Volkswagen's quantum-classical battery simulation, another hybrid workflow where the classical half does the heavy lifting — and our Yonsei Mamba neural decoder explainer for how decoding itself is being reinvented. For the bigger fault-tolerance picture, see IBM's AI-designed magic state factories.
FAQs
What is quantum error correction?
Quantum error correction protects fragile qubits by spreading one logical qubit across many physical qubits and running repeated checks. A classical computer called a decoder reads the check data and works out which errors occurred, so the computation survives even though individual qubits keep failing.
What is IBM's Nighthawk quantum processor?
Nighthawk is IBM's 120-qubit quantum processor, built on a square-lattice layout that gives each qubit up to four direct neighbours. It offers the highest connectivity of any IBM processor architecture, high circuit throughput and real-time pulse control, and it sits inside IBM Quantum System Two housing.
What is ORNL's Umbra supercomputer?
Umbra is the Quantum Science Center's high-performance computing system at Oak Ridge National Laboratory, built from AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs. In the co-design platform it provides the classical computing that trains and runs error-correction decoders at scale.
What is the DOE Genesis Mission's target for 2028?
The US Department of Energy's Genesis Mission aims to deploy a scientifically relevant quantum computer by 2028. Its Q Competition targets 100 logical qubits running 100,000 hard operations by late 2028; IBM says current experiments reach 70 logical qubits and 438 operations, roughly 230 times short.
When will fault-tolerant quantum computing arrive?
IBM plans to deliver its fault-tolerant quantum computer, Starling, by 2029, and says it will invest more than $10 billion in quantum computing. The co-design platform is part of that path, but IBM is clear it is research infrastructure, not a commercial product yet.
Takeaway: IBM, ORNL and AMD have put the two halves of quantum error correction — a 120-qubit quantum chip and a GPU supercomputer — in the same room. The decoders tested there will decide how fast fault-tolerant quantum computing arrives, and IBM's own scorecard says the field still has a 230-fold climb to its 2028 goal.
Curious how the classical half of a hybrid quantum workflow does the heavy lifting? Our explainer on IQM and Volkswagen's quantum battery simulation shows the same idea at work in EV chemistry.
Sources
- IBM Quantum Blog — ORNL, IBM, AMD launch co-design platform for QEC (5 Nov 2026)
- Reuters — IBM, AMD, Oak Ridge National Laboratory launch quantum error correction platform (5 Nov 2026)
- The Quantum Insider — Oak Ridge National Laboratory, IBM, and AMD Launch New Co-Design Platform for Quantum Error Correction (5 Nov 2026)
- Network World — IBM, Quantinuum and Intel signal a new phase in the quantum computing race (5 Nov 2026)
Comments
Post a Comment